1. Field of the Invention
This invention is related to the field of voltage controlled oscillators (VCOs) and particularly their use in phase locked loops (PLLs).
2. Description of the Related Art
PLLs are used in a wide variety of applications. In integrated circuits, especially modern integrated circuits operating at high clock frequencies, PLLs are often used to generate the internal clocks for the integrated circuit and to lock the internal clocks to the phase of the clock supplied externally. Phase locking the internal clock to the external clock may aid in providing reasonable setup and hold times for communications on the pins of the integrated circuit. PLLs are also used for clock recovery, data transmission/reception, etc.
Integrated circuits are often designed to be scaleable to different clock frequencies, allowing the integrated circuits to be marketed at different frequency levels/price points and enhancing the usefulness of the integrated circuit in a variety of systems. Accordingly, it is desirable for PLLs to operate properly over a wide range of frequencies while achieving a high degree of noise rejection and fast lock times (the amount of time needed to lock the phase of the internal clock to the external clock).
One factor affecting the frequency of operation of the PLL is a voltage controlled oscillator (VCO) within the PLL. Generally, the PLL measures the difference in phase and/or frequency between the internal clock and the external clock and controls the VCO to change the frequency of the internal clock until phase/frequency lock is achieved. Generally, it is desirable for the VCO to operate over a wide control voltage range (allowing the largest variation in the output frequency of the VCO) while still offering high noise rejection (to reduce errors induced by the noise). Additionally, the VCO must interface properly to the rest of the system, which may be operating over a different voltage range than the VCO.